Bernstein: Intel EMIB-T Challenges TSMC CoWoS, Ibiden Wins

Bernstein: Can Intel challenge TSMC with EMIB-T?
Intel has offered EMIB-T technology as an alternative to TSMC's CoWoS for AI chip packaging. Google-MediaTek is considering it for 2027 TPU, and Meta for MTIA accelerators. Ibiden is the best way to play this shift.
TSMC Revenue at Risk
~$1B
If 1mn chips shift to EMIB-T
EMIB-T Substrate ASP
~$300
vs Rubin $180-200
Ibiden Revenue Uplift
+$300M
Per 1mn chips shifted

Executive Summary

EMIB-T as potential alternative to TSMC's CoWoS.
It is based on EMIB packaging which has been used by Intel internally for years, but modified to have TSV in the substrate & silicon bridges inserted in the substrate for AI GPU/ASIC packaging. EMIB-T is better positioned to support larger reticle size: while CoWoS-S can support ~3.3× and CoWoS-L can extend to 5.5x & 9.5x later, Intel claimed EMIB already supported 6× in 2024 and aims to scale that to 8–12× by 2026–2027.
The financial impact to TSMC (Outperform) and Intel (Market-Perform) could be up to a billion dollars.
We estimate the ASP for EMIB packaging to be a few hundred $, cheaper than CoWoS which is $900-1,000, for a Rubin-equivalent chip. If 1 million chips shift from CoWoS to EMIB-T, the impact to TSMC could be close to $1bn, or ~5-10% of TSMC's advanced packaging revenue in 2027, but only ~0.5% of TSMC's total revenue.
Ibiden (Outperform) is a better way to play EMIB-T, in our view.
With EMIB-T, the complexity of packaging shifts from interposer to substrate, hence adds value to Ibiden in higher ASP (more than 50+% higher) and margins. We expect EMIB-T substrate value to rise to ~$300 or more, significantly higher vs. Blackwell substrate ($80-100) or Rubin ($180-200). Every 1mn chip shifted from CoWoS to EMIB-T means ~8% additional revenue to Ibiden in FY28/3E and more than 10% OP.
Main weakness: lack of proven track record and potentially lower yield.
The main weakness, in our view, is the lack of proven track record, and likely lower production yield due to the difficulty of embedding silicon bridges inside the substrate & aligning them precisely. The different materials of bridges (silicon) & substrate also lead to different thermal expansions & hence mechanical stress and potential cracks at the interfaces.

What is EMIB-T?

EMIB-T is an enhanced version of EMIB packaging technology developed by Intel and has been used by the company for its high-end processors since 2017. The next-generation EMIB-T technology integrates through-silicon vias (TSVs) into substrate & the silicon bridges inside the substrate, enabling direct power delivery from the package base to logic & memory dies sitting on the top of the substrate.

This advancement improves power efficiency, supports high-speed die-to-die connectivity, and significantly boosts bandwidth, & as the result positions EMIB-T as a viable solution for high-performance computing applications.

Today, EMIB is used only by Intel internally for the company's high-end chips such as server CPUs, FPGAs and AI accelerators (GPUs). For instance, the latest Clearwater Forest Xeon 6 CPUs uses EMIB extensively, embedding 12 EMIB bridges inside the substrate. The EMIB brides (or tiles) connect 12x compute tiles made with Intel's 18A process technology.


EMIB-T vs. CoWoS

Why would EMIB-T be considered as an alternative? Compared to CoWoS, EMIB-T offers a few potential advantages:

  1. Better reticle-size scaling: While TSMC now can support ~3.3x reticle size with CoWoS-S & aims to extend that to 5.5x first and then to 9.5x in 2027 with CoWoS-L, Intel claimed EMIB supports 6x in early 2024 & its roadmap aims to support 8x in 2026 & 12x in 2028. This advantage stems from using a rectangular substrate as the production carrier to create square package footprints in EMIB vs. doing that in a round wafer in CoWoS.
  2. Lower "waste" and higher efficiency: Putting squares in a round wafer means a lot of area along the edge of the wafer can't be used & will be "wasted" in the CoWoS production. And this "waste" is becoming increasingly pronounced when the package footprint enlarges to hold more logic dies & HBM stacks. Using substrate as the production carrier and the rectangular shape of the substrate intrinsically implies lower "waste" and higher production efficiency.
  3. Geopolitical advantage: Intel owns existing advanced packaging capacity in the US, mainly New Mexico (Fab 9/11x), and Malaysia. The company also established the process at Amkor's Songdo K5 facility in South Korea, and in the upcoming Arizona fab. Having both chip front end production and backend packaging both on the US soil is another compelling offering from Intel EMIB-T.
"Intel has suggested early customer engagement potentially worth 'north of a billion dollars' each—though the jury remains out."

Cost Comparison of EMIB-T and CoWoS

The EMIB process overall should be cheaper given the lower "waste" from the edge of the production carrier. Substrate for EMIB is more expensive than that of CoWoS, but even considering that, EMIB-T should offer some cost advantage, without considering the yield.

However, if the production yield is lower, the loss of damaged logic dies & HBMs may be more than offset the BOM cost advantage. As pricey logic dies & HBMs will be also lost when package fails, the required packaging yield is very high and EMIB has to achieve high yield vs. CoWoS to stay cost competitive.

AI GPUs' BOM Costs on Substrates and Advanced Packaging
BOM Costs Blackwell Rubin EMIB-T (Rubin eq.)
Substrate (revenue to substrate makers) ~$90-100 ~$180-200 ~$300?
CoWoS/EMIB Process (revenue to TSMC/Intel) ~$530 ~$920 Lower than CoWoS
Total Costs ~$620-630 ~$1,100 Lower

Financial Implications to Companies

Intel (Market-Perform)

Based on the above cost estimates, with every 1 million AI processors adopting EMIB-T, the revenue upside is high triple-digit mns $ (i.e. slightly less than $1B). We note that Intel has suggested their confidence in the size of their advanced packaging opportunity has increased. They previously had thought that customer opportunities might be in the hundreds of millions apiece, and have now suggested that they could potentially be worth "north of a billion dollars" each (though the jury remains out).

TSMC (Outperform)

Should we assume 1 million AI processors are shifted from CoWoS to EMIB, we estimate the revenue loss of TSMC would be around US$1B. That would amount to ~0.5% of TSMC's total revenue in 2027. The actual impact to TSMC may be even more negligible as likely advanced packaging capacity will be tight and other customers will step in and use the capacity released by those going to Intel.

Ibiden (Outperform)

In our opinion, the best way to play this might be through Ibiden. We like Ibiden and continue to push it as the top non-SPE pick within the Japan semiconductor sector. Ibiden's Nvidia story has been well-known to investors. The Rubin and Rubin Ultra upgrade of Nvidia AI GPUs should serve as the key growth driver, with Ibiden's substrate share regained to 100%.

Intel could present further upside to the current forecasts: Intel's EMIB adoption for internal chip use is likely to ramp up in 2H26, in our view, which is positive for Ibiden's revenue and utilization. We believe Ibiden's margins are likely to improve significantly given the complexity of new EMIB substrates. If EMIB-T gets adopted by new customers (non-Intel external customers) in 2027, there would be more upside to Ibiden's revenue and profitability.

Financial Impact: Every 1mn Chip Shifted from CoWoS (TSMC) to EMIB-T (Intel)
Financial Impacts TSMC Intel Ibiden
Revenue impact -1mn x $920 A few hundred $mns +1mn x $300
As % of 2027 revenue -0.5% ~1-2% +7.7%

Bernstein Coverage Summary

Bernstein Ticker Table
Ticker Rating Currency Price Target TTM Perf. 2026E P/E
4062.JP (Ibiden) O JPY 7,730.00 8,250.00 +209.3% 32.3x
2330.TT (TSMC) O TWD 1,765.00 1,800.00 +17.6% 6.9x
TSM (TSMC) O USD 330.56 330.00 +42.5% 8.0x
2454.TT (MediaTek) O TWD 1,705.00 1,640.00 (21.5)% 17.3x
INTC (Intel) M USD 46.47 36.00 +123.8% 64.0x

Investment Conclusion

We believe MediaTek is assessing EMIB in parallel with CoWoS for possible production late 2027 & more in 2028, as well as other customers such as Broadcom and Marvell. Google-MediaTek is reportedly considering EMIB-T for its 2027 TPU v9 (some also call it v8E), and Meta is considering it for its MTIA accelerators.

The shift from CoWoS to EMIB-T represents a meaningful opportunity for substrate suppliers, particularly Ibiden, which we rate Outperform with a price target of ¥8,250. With EMIB-T, the complexity of packaging shifts from interposer to substrate, driving up content value significantly. We expect every 1mn chips shifted to generate ~$300M additional revenue for Ibiden, representing ~8% revenue uplift and more than 10% operating profit improvement.

Our current forecast is conservative and has not baked in the margin and revenue upside from EMIB ramp up. We maintain our Outperform ratings on Ibiden, TSMC, and MediaTek, while Intel remains at Market-Perform given execution risks on its foundry ambitions.

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